Mahendra Sakare

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Publications (21)

• Circuit implementation of on-chip trainable spiking neural network using CMOS based memristive STDP synapses and LIF neurons
  Integration 2024 DOI: 10.1016/j.vlsi.2023.102122
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• A Differential Delay Cell for Ring Oscillators
  TechRxiv 2023 DOI: 10.36227/techrxiv.22003907
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• A Double Cross-Coupled Delay Cell for High-Frequency Differential Ring VCOs
  Proceedings - 2023 19th IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2023 2023 DOI: 10.1109/APCCAS60141.2023.00013
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• A Low Power Differential Delay Cell without Cross-Coupled Latch for Ring VCO
  PRIME 2023 - 18th International Conference on Ph.D Research in Microelectronics and Electronics, Proceedings 2023 DOI: 10.1109/PRIME58259.2023.10161983
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• A PRBS Generator Using Merged XOR-D Flip-Flop as Building Blocks
  Circuits, Systems, and Signal Processing 2023 DOI: 10.1007/s00034-023-02425-z
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• An active inductor employed CML latch for high speed integrated circuits
  Analog Integrated Circuits and Signal Processing 2023 DOI: 10.1007/s10470-022-02070-7
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• Analysing Mismatch effect of CMOS Neurons in Spiking Neural Network with Winner-take-all Mechanism
  2023 IEEE Nordic Circuits and Systems Conference, NorCAS 2023 - Proceedings 2023 DOI: 10.1109/NorCAS58970.2023.10305471
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• Frequency Range Enhancement in Differential Ring VCO while Maintaining Phase Noise Performance
  TechRxiv 2023 DOI: 10.36227/techrxiv.22360546
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• Full CMOS Analog Circuit Implementation of Multi-Functional Pavlov Associative Memory using STDP Learning
  WINTECHCON 2023 - IEEE Women in Technology Conference: Emerging Technologies from Silicon to Software for a Sustainable Future 2023 DOI: 10.1109/WINTECHCON58518.2023.10277203
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• Full CMOS Circuit for Brain-Inspired Associative Memory With On-Chip Trainable Memristive STDP Synapse
  IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2023 DOI: 10.1109/TVLSI.2023.3268173
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