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Publications (6)
- Power and delay optimization of domino Schmitt trigger configurations with enhanced hysteresis voltage Save
- India high performance robust keeper design technique for wide fan-in domino OR logic using CNTFET 16nm node technology Save
- Design and Performance Analysis of 6T SRAM Cell in 22nm CMOS and FINFET Technology Nodes Save
- Design and performance analysis of low frequency CMOS ring oscillator using 90nm technology Save
- Device characterization and impact of CNT diameter variation on the read write stability of CNTFET 6t SRAM cell Save
- Impact of temperature variation and oxide thickness variation on the performance of CNTFET based inverter in nanometer regime Save