AA

Abhishek Acharya

Sardar Vallabhbhai National Institute of Technology Surat, Govt. Engineering College Bikaner, Indian Institute of Technology Roorkee

ORCID iD 0000-0002-6342-667X
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Employment

  • Sardar Vallabhbhai National Institute of Technology Surat Faculty Member
    2019 - Present
  • Govt. Engineering College Bikaner Assistant Professor
    2003 - 2019

Education

  • Indian Institute of Technology Roorkee Ph.D.
    2013 - 2018

Projects & Funding

Projects & funding information is unavailable.

Publications (78)

  • Impact of S/D Extension Length and Sheet Stacking on Transient Behavior of Nanosheet FETs
    2024 IEEE International Symposium on Circuits and Systems (ISCAS) 2024
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  • Impact of Unconventional Torque on the Performance of Weyl-Semimetal-Based SOT-MTJ: A Micromagnetic Study
    IEEE Transactions on Electron Devices 2024
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  • Influences of Source/Drain Extension Region on Thermal Behavior of Stacked Nanosheet FET
    IEEE Transactions on Electron Devices 2024
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  • Performance Optimization of III-V Homo/Heterojunction Line TFET: Device-Circuit Interaction
    10th Joint EuroSOI Workshop and International Conference on Ultimate Integration on Silicon, Greece 2024
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  • Proposal & Investigation of Schottky Ring Engineered Reconfigurable Nanowire Transistor
    2024 IEEE International Symposium on Circuits and Systems (ISCAS) 2024
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  • Reliability Aspects of Negative-Capacitance Stacked Nanosheet FET Considering Self Heating Effect
    10th Joint EuroSOI Workshop and International Conference on Ultimate Integration on Silicon (EuroSOI-ULIS 2024), Greece 2024
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  • TID aware Efficient Standard Cell Characterization and its Application on the Path level Timing Performance of the Digital Circuits
    10th Joint EuroSOI Workshop and International Conference on Ultimate Integration on Silicon (EuroSOI-ULIS 2024), Greece 2024
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  • Challenges and future scope of gate-all-around (GAA) transistors: Physical insights of device-circuit interactions
    Device Circuit Co-Design Issues in FETs 2024
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  • Performance Evaluation of High-κ Dielectric Ferro-Spacer Engineered Si/SiGe Hetero-Junction Line TFETs: A TCAD Approach
    IEEE Transactions on Dielectrics and Electrical Insulation 2023 DOI: 10.1109/TDEI.2023.3266413
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  • Investigation of Field-Free Switching of 2-D Material-Based Spin-Orbit Torque Magnetic Tunnel Junction
    IEEE Transactions on Electron Devices 2023 DOI: 10.1109/TED.2023.3237654
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