Jawar Singh

Employment

• Indian Institute of Technology Patna Professor
  2022 - Present
• Indian Institute of Technology Patna Department of Electrical Engineering Associate Professor
  2017 - Present
• Indian Institute of Information Technology Desing and Manufacturing Associate Professor
  2011 - 2017
• Jaypee University of Engineering and Technology Assistant Professor
  2010 - 2011
• LNM Institute of Information Technology Assistant Professor
  2010 - 2010
• Madhav Institute of Technology and Science Lecturer
  2002 - 2006

Education

• University of Bristol PhD
  2007 - 2010
• Indian Institute of Technology Roorkee M.Tech.
  1999 - 2001
• Madhav Institute of Technology and Science B.E.
  1995 - 1999

Projects & Funding

Projects & funding information is unavailable.

Publications (77)

• L-Shaped Tunnel Field-Effect Transistor-Based 1T DRAM With Improved Read Current Ratio, Retention Time, and Sense Margin
  IEEE Transactions on Electron Devices 2021 DOI: 10.1109/ted.2021.3074348
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• A low power L-shaped gate bipolar impact ionization MOSFET based capacitorless one transistor dynamic random access memory cell
  Japanese Journal of Applied Physics 2021 DOI: 10.35848/1347-4065/ac016c
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• A Highly Scalable Junctionless FET Leaky Integrate-and-Fire Neuron for Spiking Neural Networks
  IEEE Transactions on Electron Devices 2021 DOI: 10.1109/ted.2021.3061036
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• A Raised Source/Drain Dopingless Tunnel FET with Stacked Source: Design and Analysis
  Silicon 2021 DOI: 10.1007/s12633-021-01098-0
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• Channel-hot-carrier degradation in the channel of junctionless transistors: a device- and circuit-level perspective
  Journal of Computational Electronics 2021 DOI: 10.1007/s10825-021-01688-6
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• Detection and Spread Prediction of COVID-19 from Chest X-ray Images using Convolutional Neural Network-Gaussian Mixture Model
  2020 IEEE 17th India Council International Conference (INDICON) 2020 DOI: 10.1109/indicon49873.2020.9342159
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• Impact of Temporal Variability on Dopingless and Junctionless FET based SRAM Cells
  Silicon 2020 DOI: 10.1007/s12633-020-00747-0
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• Capacitorless 2T-DRAM for Higher Retention Time and Sense Margin
  IEEE Transactions on Electron Devices 2020 DOI: 10.1109/ted.2020.2963995
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• Static and Quasi-Static Drain Current Modeling of Tri-Gate Junctionless Transistor With Substrate Bias-Induced Effects
  IEEE Transactions on Electron Devices 2019 DOI: 10.1109/ted.2019.2915294
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• Analog/RF Performance Investigation of Dopingless FET for Ultra-Low Power Applications
  IEEE Access 2019 DOI: 10.1109/ACCESS.2019.2937444
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