Employment
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Ganpat University Assistant Professor2006 - Present
Education
Education history is unavailable.
Projects & Funding
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Publications (14)
- Design, Implementation and Verification of UART with APB Slave Interface Using Verilog Save
- Development and UVM-Based Functional Verification of a Scalable and Configurable UART VIP Save
- Design and Optimization in SPI Master at the RTL Level Save
- Enhancing ASIC Design Efficiency: A Focus on RTL Verification with Spyglass Save
- Performance Evaluation of Parallel Processing Adder Against Basic Adders on FPGAs Save
- Congestion Estimation Using Various Floorplan Techniques in 28nm Soc Design Save
- Optimization of Floorplan Strategies to Reduce Timing Violation on 28nm ASIC and Scopes of Improvement for Data Center ASICs Save
- Test Logic Insertion for Optimization of Testing Parameters on Lower Technology Node Save
- TAP (Time, Area, and Power) trade off at lower geometries in data center ASIC: A deep dive into executional view and results Save
- Performance evaluation of 14-nm FinFET-based ring counter using BSIM-CMG model Save