Celia Dharmaraj

Employment

Employment history is unavailable.

Education

• Indian Institute of Technology Madras PhD
  2013 - Present
• National Institute of Technology Tiruchirappalli MTech
  2002 - 2004
• St.Peter's Engineering College BE
  1998 - 2002

Projects & Funding

Projects & funding information is unavailable.

Publications (5)

• Optimization of Signal Processing Applications Using Parameterized Error Models for Approximate Adders
  ACM Transactions on Embedded Computing Systems 2021 DOI: 10.1145/3430509
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• Analysis of power–accuracy trade‐off in digital signal processing applications using low‐power approximate adders
  IET Computers & Digital Techniques 2021 DOI: 10.1049/cdt2.12006
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• Probabilistic Error Modeling for Two-part Segmented Approximate Adders
  2018 IEEE International Symposium on Circuits and Systems (ISCAS) 2018 DOI: 10.1109/iscas.2018.8351273
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• Optimizing power-accuracy trade-off in approximate adders
  2018 Design, Automation & Test in Europe Conference & Exhibition (DATE) 2018 DOI: 10.23919/date.2018.8342248
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• Guided multilevel approximation of less significant bits for power reduction
  2016 20th International Symposium on VLSI Design and Test (VDAT) 2016 DOI: 10.1109/isvdat.2016.8064879
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