Amit Jha

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Publications (12)

• Phase Noise Reduction in LC VCO’s Using an Array of Cross-Coupled Nanoscale MOSFETs and Intelligent Post-Fabrication Selection
  IEEE Transactions on Microwave Theory and Techniques 2022 DOI: 10.1109/TMTT.2022.3164949
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• Approaches to Area Efficient High-Performance Voltage-Controlled Oscillators in Nanoscale CMOS
  IEEE Transactions on Microwave Theory and Techniques 2021 DOI: 10.1109/TMTT.2020.3032721
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• A 5.4GHz 0.65dB NF 6dBm IIP3 MGTR LNA in 130nm SOI CMOS
  2021 IEEE 21st Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2021 2021 DOI: 10.1109/SiRF51851.2021.9383421
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• Frequency Sensitivity of Integrated Oscillators to Nearby Conductors
  2021 IEEE 21st Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2021 2021 DOI: 10.1109/SiRF51851.2021.9383397
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• A 0.6dB NF, 12dBm IIP3, 4.6-6GHz LNA in 0.13μm Floating-Body SOI CMOS
  2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS) 2020 DOI: 10.1109/mwscas48704.2020.9184432
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• −197dBc/Hz FOM 4.3-GHz VCO Using an addressable array of minimum-sized nmos cross-coupled transistor pairs in 65-nm CMOS
  2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits) 2016 DOI: 10.1109/vlsic.2016.7573540
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• 410-GHz CMOS imager using a 4th sub-harmonic mixer with effective NEP of 0.3 fW/Hz0.5 at 1-kHz noise bandwidth
  2015 Symposium on VLSI Circuits (VLSI Circuits) 2015 DOI: 10.1109/vlsic.2015.7231299
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• Voltage controlled oscillator area reduction in nano-scale CMOS
  2014 IEEE Radio Frequency Integrated Circuits Symposium 2014 DOI: 10.1109/rfic.2014.6851757
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• Benchmark Tests for MOSFET Compact Models With Application to the PSP Model
  IEEE Transactions on Electron Devices 2009 DOI: 10.1109/ted.2008.2010570
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• Benchmarking the PSP Compact Model for MOS Transistors
  2007 IEEE International Conference on Microelectronic Test Structures 2007 DOI: 10.1109/icmts.2007.374495
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