About
I am a doctoral candidate at the Indian Institue of Technology Gandhinagar. I am researching on the design of high/low power LDMOS transistors for RF applications. My interests include RF IC design, Real-time TCAD development using DNNs, and Power amplifier design
Employment
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Indian Institute of Technology Gandhinagar Junior Research Fellow2017 - 2018
Education
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Indian Institute of Technology Gandhinagar Ph.D.2018 - Present
Projects & Funding
Projects & funding information is unavailable.
Publications (4)
- Inverse Design of High Power and High Voltage LDMOS Transistors Using Deep Learning-Based Sample-Efficient Surrogate Model Save
- On the improved RF performance of step field plate LDMOS transistor Save
- Surrogate models for device design using sample-efficient Deep Learning Save
- Novel Step Field Plate RF LDMOS Transistor for Improved BVDS-R on Tradeoff and RF Performance Save