Sidhartha Sankar Rout

Employment

• Birla Institute of Technology and Science Guest Faculty
  2017 - 2018
• Jaypee Institute of Information Technology Assistant Professor
  2014 - 2017
• STMicroelectronics (India) Intern
  2013 - 2014
• Biju Patnaik University of Technology Lecturer
  2010 - 2011
• Wipro Limited Project Engineer
  2008 - 2010

Education

• Indraprastha Institute of Information Technology Delhi Ph.D
  2017 - 2023
• Indraprastha Institute of Information Technology Delhi M.Tech in VLSI & Embedded Systems
  2012 - 2014
• National Institute of Science and Technology B.Tech
  2004 - 2008

Projects & Funding

Projects & funding information is unavailable.

Publications (16)

• Detection and Localization of Hardware-Assisted Intermittent Power Attacks in Mixed-Critical Systems
  IEEE Transactions on Circuits and Systems I: Regular Papers 2025 DOI: 10.1109/TCSI.2024.3493386
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• NoCiPUF: NoC-Based Intrinsic PUF for MPSoC Authentication
  IEEE Transactions on Circuits and Systems I: Regular Papers 2025 DOI: 10.1109/TCSI.2025.3559419
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• 2DMAC: A Sustainable and Efficient Medium Access Control Mechanism for Future Wireless NoCs
  ACM Journal on Emerging Technologies in Computing Systems 2023 DOI: 10.1145/3570727
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• ReDeSIGN: Reuse of Debug Structures for Improvement in Performance Gain of NoC Based MPSoCs
  IEEE Transactions on Emerging Topics in Computing 2023 DOI: 10.1109/TETC.2022.3203611
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• WiND: An Efficient Post-Silicon Debug Strategy for Network on Chip
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2021 DOI: 10.1109/TCAD.2020.3044897
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• Sniffer: A Machine Learning Approach for DoS Attack Localization in NoC-Based SoCs
  IEEE Journal on Emerging and Selected Topics in Circuits and Systems 2021 DOI: 10.1109/JETCAS.2021.3083289
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• Efficient Post-Silicon Validation of Network-on-Chip Using Wireless Links
  2019 32nd International Conference on VLSI Design and 2019 18th International Conference on Embedded Systems (VLSID) 2019 DOI: 10.1109/vlsid.2019.00082
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• Efficient Data Compression Scheme for Secured Application Needs
  VLSI Design and Test 2019 DOI: 10.1007/978-981-13-5950-7_19
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• Reliability Analysis of On-Chip Wireless Links for Many Core WNoCs
  2018 Conference on Design of Circuits and Integrated Systems (DCIS) 2018 DOI: 10.1109/dcis.2018.8681475
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• Enabling Reliable High Throughput On-chip Wireless Communication for Many Core Architectures
  2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) 2018 DOI: 10.1109/isvlsi.2018.00113
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