Swatilekha Majumdar

Employment

• IBM (Germany) Hardware Design Engineer
  2022 - Present
• Imec Postdoctoral Researcher
  2020 - 2022
• STMicroelectronics (India) Graduate Intern
  2013 - 2014

Education

• Indian Institute of Technology Delhi Doctorate of Philosophy
  2014 - 2020
• Indraprastha Institute of Information Technology Master of Technology
  2012 - 2014
• Guru Gobind Singh Indraprastha University Bachelor of Technology
  2007 - 2011

Projects & Funding

Projects & funding information is unavailable.

Publications (8)

• LEnS: Lifetime Enhancement Coding Scheme for Non-Volatile Memory Processors
  IEEE International Midwest Symposium on Circuits and Systems 2021
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• Single Bit-line Differential Sensing Based Real-time NVSRAM for Low Power Applications
  IEEE Transactions on Circuits and Systems II: Express Briefs 2021 DOI: 10.1109/TCSII.2021.3050250
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• Semi-Empirical $RC$ Circuit Model for Non-Filamentary Bi-Layer OxRAM Devices
  IEEE Transactions on Electron Devices 2020 DOI: 10.1109/TED.2020.2964113
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• Investigation of Unified Emerging-NVM SoC Architecture for IoT-WSN Applications
  IEEE 2019 32nd International Conference on VLSI Design and 2019 18th International Conference on Embedded Systems (VLSID) 2019 DOI: 10.1109/vlsid.2019.00067
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• A Novel Gate-Level On-Chip Crosstalk Noise Reduction Circuit for Deep Sub-micron Technology
  2019 DOI: 10.1007/978-981-32-9767-8_15
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• Programming scheme based optimization of hybrid 4T-2R OxRAM NVSRAM
  Semiconductor Science and Technology 2017 DOI: 10.1088/1361-6641/aa811c
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• Stability analysis of hybrid CMOS-RRAM based 4T-2R NVSRAM
  2017 15th IEEE International New Circuits and Systems Conference (NEWCAS) 2017 DOI: 10.1109/newcas.2017.8010121
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• Hybrid CMOS-OxRAM based 4T-2R NVSRAM with efficient programming scheme
  2016 16th Non-Volatile Memory Technology Symposium (NVMTS) 2016 DOI: 10.1109/nvmts.2016.7781513
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