kajal

Employment

• National Institute of Technology Srinagar Assistant Professor (Contractual)
  2025 - Present
• Central University of Jammu Project Assistant
  2024 - 2025

Education

• Shri Mata Vaishno Devi University M.TECH (VLSI)
  2016 - 2018
• Kurukshetra University B.TECH
  2013 - 2016
• Govt. polytechnic for women jammu 3 year Diploma
  2011 - 2013

Projects & Funding

Projects & funding information is unavailable.

Publications (13)

• A Blockchain‐Based <scp>OBD</scp> Architecture for Secure Data Sharing in Smart Vehicle Ecosystems
  SECURITY AND PRIVACY 2026 2 citations DOI: 10.1002/spy2.70158
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• Performance Evaluation of QoS Parameters of UAV for Lunar Surface Exploration
  2026 0 citations DOI: 10.1007/978-3-032-06674-9_40
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• Federated Learning for Secure Multi‐ <scp> UAV </scp> Coordination
  SECURITY AND PRIVACY 2025 1 citation DOI: 10.1002/spy2.70134
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• NBTI Effect Survey for Low Power Systems in Ultra-Nanoregime
  Current Nanoscience 2024 19 citations DOI: 10.2174/0115734137252023230919054547
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• Study of the Reliability for the Leakage Mitigation Methods using FinFETs
  Recent Advances in Electrical & Electronic Engineering (Formerly Recent Patents on Electrical & Electronic Engineering) 2023 17 citations DOI: 10.2174/2352096516666230414134447
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• An efficient low power method for FinFET domino OR logic circuit
  Microprocessors and Microsystems 2022 26 citations DOI: 10.1016/j.micpro.2022.104719
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• Reliability and PVT simulation of FinFET circuits using Cadence Virtuoso
  2021 5th International Conference on Electrical, Electronics, Communication, Computer Technologies and Optimization Techniques (ICEECCOT) 2021 7 citations DOI: 10.1109/iceeccot52851.2021.9707937
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• Design and Simulation for NBTI Aware Logic Gates
  Wireless Personal Communications 2021 17 citations DOI: 10.1007/s11277-021-08522-z
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• Design and Simulation of FinFET Circuits at Different Technologies
  2021 6th International Conference on Inventive Computation Technologies (ICICT) 2021 26 citations DOI: 10.1109/icict50816.2021.9358487
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• An Investigation for the Negative-Bias Temperature Instability Aware CMOS Logic
  Micro and Nanosystems 2021 18 citations DOI: 10.2174/1876402913666210125144339
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