manoj saxena

About

Manoj Saxena is currently Professor in Department of Electronics, Deen Dayal Upadhyaya College, University of Delhi, New Delhi, India. He received B.Sc. (with honors), M. Sc., and Ph.D. degrees from the University of Delhi in 1998, 2000, and 2006 respectively. He has authored or coauthored 300+ technical papers in international journals and various international and national conferences. His current research interests are in the areas of analytical modeling, design, and simulation of non classical MOSFET architectures like silicon-on-nothing, insulated-shallow-extension, grooved/concave-gate, cylindrical gate and Tunnel FET. He is reviewer to many journals including Solid State Electronics, Journal of Physics: D Applied Physics and IEEE TED and EDL. He is Senior Member of IEEE and also Member of Institute of Physics (UK), Institution of Engineering and Technology (UK), National Academy of Sciences India (NASI), Associate of Indian Academy of Sciences, Bangalore member of International Association of Engineers (Hong Kong) and IEEE Electron Device Society-Region 10 SRC Vice Chair (2016-2017). He was Regional Editor for South Asia, IEEE EDS Newsletter and currently Member – EDS Board of Governors; EDS Distinguished Lecturer and Fellow-IETE, India. For his voluntary contribution, he has received the outstanding EDS Volunteer recognition from EDS Chapters in the region in 2012.

Employment

• Deen Dayal Upadhyaya College, University of Delhi, New Delhi Professor
  2018 - Present

Education

• University of Delhi - South Campus Ph. D

Projects & Funding

Projects & funding information is unavailable.

Publications (258)

• On the reliability of HfO2-based FeFETs for memory applications
  Microsystem Technologies 2025 DOI: 10.1007/s00542-025-05919-9
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• Small Signal and Large Signal Analysis of 150 nm GaN HEMT with Optimized Field Plates for Ku-Band Application
  IETE Technical Review 2025 DOI: 10.1080/02564602.2025.2560803
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• An Ensemble MLP-RF Model for the Prediction of DG-MOSFETs: Addressing Fabrication Process Variations
  Proceedings of the IEEE International Conference on VLSI Design 2025 DOI: 10.1109/VLSID64188.2025.00088
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• Impact of Angled Heavy Ion Particle Strike on GaN-Based P-Channel FETs for Space Applications
  2025 DOI: 10.1007/978-981-96-3758-4_14
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• Investigating RF Parameters with Diverse Field Plate Structure for AlGaN/GaN HEMT with 0.15 µm Gate Length
  2025 DOI: 10.1007/978-981-96-3758-4_8
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• Reliability Analysis of GaN-Based n-Channel HEMT with p-GaN/AlGaN/GaN Epitaxial Stack Under Heavy Ion Particle Strikes
  2025 DOI: 10.1007/978-981-96-3758-4_15
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• Role of in-situ SiNx in ohmic contact realization in AlN/GaN HEMTs
  Journal of Materials Science: Materials in Electronics 2025 DOI: 10.1007/S10854-025-15443-1
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• γ-Ray Induced Effects on COTS E-Mode p-GaN AlGaN/GaN HEMTs
  2025 DOI: 10.1007/978-981-96-3758-4_11
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• Degradation Mechanism of Piezoresistive Sensors Under the Influence of γ -Ray Irradiation
  IEEE Sensors Journal 2024 DOI: 10.1109/JSEN.2024.3467103
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• Impact of Graded AlGaN Buffer Layer Thickness on the DC, RF, Linearity, Intermodulation and Off-State Breakdown Characteristics of AlGaN Channel HEMT
  IETE Technical Review 2024 DOI: 10.1080/02564602.2024.2315628
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