Dr. Ram Krishna Dewangan (M.Tech. and PhD. in VLSI)

Employment

• Government Engineering College Jagdalpur Assistant Professor
  2016 - Present

Education

Education history is unavailable.

Projects & Funding

Projects & funding information is unavailable.

Publications (7)

• Design Exploration of 3D Stacked Nanosheet FETs under Temperature and Work Function Variation: Insights for 5-nm Nanoscale Device Integration
  Progress in Nanoscience and Nanotechnology 2026 DOI: 10.2174/0122106812429155251203054946
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• Investigation of triple vertically stacked nanosheet FET with geometric variability at advanced technology node: DC, analog and RF performance benchmarking
  Physica Scripta 2025 DOI: 10.1088/1402-4896/adac14
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• Impact of Gate Length Scaling on Sub-5 nm Dual FinFET and Vertically Stacked Triple Nanosheet FET Performance with Same Layout Footprint
  2025 DOI: 10.1007/978-981-95-0203-5_13
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• Method for Measurement of Source Resistance of Top-Contact Pentacene Organic Thin-Film Transistors
  IEEE Transactions on Electron Devices 2025 DOI: 10.1109/TED.2025.3588145
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• Comparative Performance Analysis of Dual FinFET and Gate-All-Around Triple Nanosheet FET for 5nm Node
  Ieee International Conference of Electron Devices Society Kolkata Chapter, Edkcon 2024 DOI: 10.1109/EDKCON62339.2024.10870821
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• Design and DC Electrical Performance Analysis of SOI-Based SiO2/HfO2 Dual Dielectric Gate-All-Around Vertically Stacked Nanosheet at 5 nm Node
  2023 DOI: 10.1007/978-981-99-0973-5_58
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• Analog and RF Performance Analysis of SiO2/HfO2 Dual Dielectric Gate All Around Vertically Stacked Nanosheet FET for 5nm Technology Node
  2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON) 2022 DOI: 10.1109/edkcon56221.2022.10032848
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