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Priyadarsan Patra

NIST University, DIT University, University of Massachusetts Amherst, The University of Texas at Austin, University of Petroleum and Energy Studies, Indian Institute of Science

ORCID iD 0000-0002-9585-0598
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About

Dr. Priyadarsan Patra is the Vice Chancellor and Chair of Management Committee at NIST University.

LinkedIn: https://www.linkedin.com/in/darshanpatra/

Prof. (Dr) Priyadarsan Patra was earlier the Pro Vice-Chancellor and Distinguished Professor of DIT University. He has served as a Chief Architect and Principal Scientist of the R&D divisions of Intel Corp (USA) and as the Dean of Computer Sciences at UPES University and Dean of Research at Xavier University. Over the years, he created and led world-class research and development for Servers, Systems-on-Chip, and intelligent devices. His research interests include applications of Machine Learning, Big Data & Cloud Computing, and the design of Low-power and Intelligent systems.
He has edited multiple technical proceedings, has authored 80+ scholarly publications, four scientific books, 13 USA and international patents, and other influential articles. Prof. Patra had developed an architecture for building Single Flux Quantum Circuits and adiabatic circuits for his dissertation. Elected Senior Member of both the IEEE and the ACM and an IE Fellow, Prof. Patra is the Founding Chair of the global IEEE System Validation and Debug Technology Committee and serves on several Boards of Advisors.
Passionate about social development and volunteerism worldwide for over 25+ years, he has founded the Sustainable Economic and Educational Development Society (SEEDS) and has worked on sustainable and appropriate technology, various facets of better access to education, and women’s empowerment, through multiple initiatives in India and abroad.
Dr. Patra holds a Ph.D. degree in Computer Sciences from the University of Texas at Austin, an M.S. from the University of Massachusetts at Amherst, and a B.Engg from the Indian Institute of Science, Bangalore.

Employment

  • NIST University Vice Chancellor
    2024 - Present
  • DIT University Pro Vice Chancellor and Distinguished Professor
    2021 - 2024
  • University of Petroleum and Energy Studies Dean, Professor; BOM and BOG Member; Advisor
    2021 - 2021
  • Intel Corp Chief Validation Architect
    2016 - 2018
  • Intel Corp Hillsboro Principal Scientist
    2013 - 2016
  • Xavier University/Xavier Institute of Management Dean of Research and Dean of Computer Science & Engineering
    ? - 2021

Education

  • University of Massachusetts Amherst MS
  • The University of Texas at Austin Ph.D.
  • Indian Institute of Science B.E.

Projects & Funding

Projects & funding information is unavailable.

Publications (52)

  • Message by Program Chair
    2023 11th International Conference on Intelligent Systems and Embedded Design (ISED) 2023 DOI: 10.1109/ised59382.2023.10444579
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  • The Internet of Medical Things: Enabling Technologies and Emerging Applications
    2021
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  • Test, validation, and debug architecture
    2020
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  • Test, validation, and debug architecture
    2019
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  • TEST, VERIFICATION, AND PROGRAM AND METHOD OF DEBUG ARCHITECTURE
    2017
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  • TEST, VALIDATION, AND DEBUG ARCHITECTURE
    2015
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  • Selected Articles from the IEEE ISED 2014 Conference.
    Journal of Low Power Electronics 2015
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  • Selected Articles from the IEEE ISED 2014 Conference.
    Journal of Low Power Electronics 2015
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  • PROGRAM AND METHOD OF TEST, VERIFY AND DEBUG ARCHITECTURE
    2014
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  • Organizing Committee ISED 2014
    2014
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