UM
Usha Mehta
Also known as: Usha Sandeep Mehta, Dr Usha Mehta, Prof Usha Mehta, Prof. (Dr.) Usha Mehta, U Mehta, U S Mehta, Usha S Mehta
Nirma University of Science and Technology Institute of Technology, L. D. College of Engineering, Gujarat University, Dharmsinh Desai University, Amess Controls Pvt. Ltd.
Employment
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Nirma University of Science and Technology Institute of Technology Professor2013 - Present
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Nirma University of Science and Technology Institute of Technology Sr. Associate Professor2008 - 2013
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Nirma University of Science and Technology Institute of Technology Assistant Professor2005 - 2008
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Nirma University of Science and Technology Institute of Technology Lecturer2001 - 2005
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Nirma University of Science and Technology Institute of Technology Visiting Faculty2001 - 2001
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L. D. College of Engineering, Gujarat University Visiting Faculty2000 - 2000
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Amess Controls Pvt. Ltd. Production Manager1996 - 1999
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Videocon Int. Ltd. Research and Development Engineer1995 - 1995
Education
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Nirma University of Science and Technology Institute of Technology Ph. D. (VLSI Design and Test)2008 - 2011
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Nirma University of Science and Technology Institute of Technology M. Tech. ( VLSI Design)2003 - 2005
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Dharmsinh Desai University B. E. (EC)1990 - 1994
Projects & Funding
Projects & funding information is unavailable.
Publications (89)
- Assessing Effect of Variability in Nano-Scale Futuristic On-Chip Interconnects Save
- Analytical method for cell displacement defect quantum-dot cellular automata primitive Save
- Defense against Security Threats with Regard to SoC Life Cycle Save
- Design and Simulation of Ultra-Low-Power Parallel Summation Logarithmic Amplifier Save
- Development and Comparative Analysis of Delay Fault Models for Variants of High Speed CNT Interconnects at Submicron Technology Save
- Parametric and Fault Analysis of Next Generation High Speed Interconnects Save
- Performance Analysis of RTL to GDS-II Flow in Opensource Tool Qflow and Commercial Tool Cadence Encounter for Synchronous FIFO Save
- Robust Schmitt Trigger-based Performance Booster Technique for Futuristic On-Chip Graphene Interconnects Save
- Test Pattern Generator for MV-Based QCA Combinational Circuit Targeting MMC Fault Models Save
- Transition Probability-Based Detection of Hardware Trojan in Digital Circuits Save