Employment
-
BVRIT HYDERABAD College of Engineering for Women
Education
Education history is unavailable.
Projects & Funding
Projects & funding information is unavailable.
Publications (8)
- Performance Analysis of SER Massive MIMO Systems Using Space–Time Block Coding Save
- Hardware efficient arithmetic reconfigurable fully homomorphic encryption (ARFHE) accelerator of low power IoT based RISC-V processor Save
- Area efficient SDR receiver without and with dynamic partial reconfiguration Save
- Area efficient SDR receiver without and with dynamic partial reconfiguration Save
- Zynq-7000 all programmable SoC implementation of configurable folded IIR filter design Save
- Area Efficient SDR Receiver with Dynamic Partial Reconfiguration Save
- Area Efficient Implementation of FSK Receiver on Xilinx Zynq FPGA Save
- Improved Block Based Processing with Dual Partial Reconfiguration Memory Approach Save