Binit Kumar Pandit

About

Binit Kumar Pandit is an Assistant Professor at the Institute of Engineering and Management (IEM), Kolkata, University of Engineering and Management (UEM), Kolkata, India. He has submitted his Ph.D. thesis in the Department of Electronics and Telecommunication Engineering at the Indian Institute of Engineering Science and Technology (IIEST), Shibpur, Howrah, India. He received his M.Tech. with specialization in VLSI Design from IIEST, Shibpur, and his B.Tech. in Electronics and Communication Engineering from UIET, MDU, Rohtak, Haryana, India.

His research interests include deep learning-based medical image analysis, computationally efficient neural networks, VLSI architecture design, hardware accelerator design for machine learning applications, FPGA-based hardware acceleration and prototyping, hardware–software co-design, and biomedical signal processing. His research focuses on developing resource-efficient deep learning algorithms and tailored hardware architectures for real-time and on-device medical image processing applications.

Employment

• University of Engineering & Management

Education

Education history is unavailable.

Projects & Funding

Projects & funding information is unavailable.

Publications (10)

• Fast and efficient inference strategy for medical image segmentation using input-aware dynamically configured neural network architecture
  The Journal of Supercomputing 2026 DOI: 10.1007/s11227-026-08709-w
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• Error-Tolerant Medical Image Segmentation Using Resource-Efficient Approximate Booth Multipliers
  IEEE Embedded Systems Letters 2026 DOI: 10.1109/LES.2025.3612357
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• A Dynamic Window Size-Based VLSI Architecture Design of Moving Average Filter and Its Vulnerability to Hardware Trojans
  2024 28th International Symposium on VLSI Design and Test (VDAT) 2024 DOI: 10.1109/vdat63601.2024.10705727
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• Resource-efficient VLSI Architecture of Softmax Activation Function for Real-time Inference in Deep Learning Applications
  2023 International Symposium on Devices, Circuits and Systems (ISDCS) 2023 DOI: 10.1109/isdcs58735.2023.10153520
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• Deep Neural Network Based Multi-Object Detection for Real-time Aerial Surveillance
  2023 11th International Symposium on Electronic Systems Devices and Computing (ESDC) 2023 DOI: 10.1109/esdc56251.2023.10149866
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• VLSI Architecture of Generalized Pooling for Hardware Acceleration of Convolutional Neural Networks
  2023 11th International Symposium on Electronic Systems Devices and Computing (ESDC) 2023 DOI: 10.1109/esdc56251.2023.10149878
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• 3D EdgeSegNET: a deep neural network framework for simultaneous edge detection and segmentation of medical images
  Signal, Image and Video Processing 2023 DOI: 10.1007/S11760-023-02518-X
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• Computation-Efficient and Multiplierless Hardware Realization of Decimation in Time FFT
  2022 IEEE Region 10 Symposium, TENSYMP 2022 2022 DOI: 10.1109/TENSYMP54529.2022.9864458
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• Low Power and High Precision Analog VLSI Design of 1-D DCT for Real-time Application
  2022 IEEE Region 10 Symposium, TENSYMP 2022 2022 DOI: 10.1109/TENSYMP54529.2022.9864386
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• VLSI Architecture of Sigmoid Activation Function for Rapid Prototyping of Machine Learning Applications
  IEEE International Symposium on Smart Electronic Systems (iSES) 2021 DOI: 10.1109/ISES52644.2021.00036
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