Lalthanpuii Khiangte

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Publications (13)

• Analysis of capacitance–voltage characteristics for ultrathin si/sige/si hetero-layered mos structure
  Advances in Intelligent Systems and Computing 2020 DOI: 10.1007/978-981-15-0339-9_8
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• Design of double gate nano-FET
  2019 2nd International Conference on Advanced Computational and Communication Paradigms, ICACCP 2019 2019 DOI: 10.1109/ICACCP.2019.8882931
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• Drift diffusion and advance hydrodynamic simulation for the design of double-gate SOI MOSFET in nano-scale regime
  2019 2nd International Conference on Advanced Computational and Communication Paradigms, ICACCP 2019 2019 DOI: 10.1109/ICACCP.2019.8882967
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• Strained SI/SIGE/SI nano-channel hoi mosfet
  International Journal of Recent Technology and Engineering 2019 DOI: 10.35940/ijrte.B1229.0782S319
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• Strained Si/Sige/Si nano-channel HOI MOSFET
  International Journal of Innovative Technology and Exploring Engineering 2019
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• Sub-50nm tri-layered strained Si/SiGe/Si channel nMOSFET
  International Journal of Innovative Technology and Exploring Engineering 2019
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• TCAD Modelling of 30nm Strained-Si/SiGe/Si Channel MOSFET
  Proceedings of 3rd International Conference on 2019 Devices for Integrated Circuit, DevIC 2019 2019 DOI: 10.1109/DEVIC.2019.8783606
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• Development of Tri-Layered s-Si/s-SiGe/s-Si Channel Heterostructure-on-Insulator MOSFET for Enhanced Drive Current
  Physica Status Solidi (B) Basic Research 2018 DOI: 10.1002/pssb.201800034
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• Development of double strained Si channel for heterostructure on insulator MOSFET
  Proceedings - 2017 2nd International Conference on Man and Machine Interfacing, MAMI 2017 2018 DOI: 10.1109/MAMI.2017.8307880
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• Double Strained Channel MOSFET: Deep into Sub-Microns
  2018 Conference on Information and Communication Technology, CICT 2018 2018 DOI: 10.1109/INFOCOMTECH.2018.8722385
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