Avinash Lahgere

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Publications (26)

• Efficacy of π-gate in LDMOS for improved safe operating area and figure of merits
  Semiconductor Science and Technology 2026 DOI: 10.1088/1361-6641/ae6366
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• Evaluation of Radiation Resilience, Performance, and Vmin of Sub-3 nm FSFET Based SRAM Arrays
  IEEE Transactions on Computers 2026 DOI: 10.1109/TC.2025.3649150
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• Revisiting Negative Capacitance Effect for 1T-DRAM Application
  IEEE Transactions on Electron Devices 2026 DOI: 10.1109/TED.2026.3683039
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• Soft Error Analysis in NSFET and FSFET: From Device Physics to Circuit and Memory Impact
  IEEE Transactions on Electron Devices 2026 DOI: 10.1109/TED.2026.3656164
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• Comprehensive TCAD-based geometry study on self-aligned coplanar top gate a-IGZO TFTs
  APL Electronic Devices 2026 DOI: 10.1063/5.0305029
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• Comprehensive TCAD-Based Single Event Effect Study of TFET-Based 1T DRAM and Crossbar Memory Array
  IEEE Transactions on Device and Materials Reliability 2025 DOI: 10.1109/TDMR.2025.3528903
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• Evaluation of Radiation Resilience, Performance, and V min of Sub-3 nm FSFET based SRAM Arrays
  2025 DOI: 10.36227/techrxiv.173948796.66898862/v1
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• An Investigation of Minimum Supply Voltage of 5-nm SRAM From 300 K Down to 10 K
  IEEE Journal on Exploratory Solid-State Computational Devices and Circuits 2025 DOI: 10.1109/JXCDC.2025.3560215
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• Physics-Based SPICE Model of Slant Field Plate GaN HEMTs
  IEEE Transactions on Electron Devices 2025 DOI: 10.1109/TED.2025.3590356
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• A Comprehensive Analysis of Safe Operating Area Limits in Ferroelectric-Based DEMOS
  IEEE Transactions on Electron Devices 2024 DOI: 10.1109/TED.2024.3486265
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