Smt. V. Leela   Rani

Employment

• Gayatri Vidya Parishad College of Engineering

Education

Education history is unavailable.

Projects & Funding

Projects & funding information is unavailable.

Publications (5)

• Particle Swarm Optimization Algorithm for Leakage Power Reduction in VLSI Circuits
  International Journal of Electronics and Telecommunications 2016 8 citations DOI: 10.1515/eletel-2016-0025
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• Pass Transistor-Based Pull-Up/Pull-Down Insertion Technique for Leakage Power Optimization in CMOS VLSI Circuits
  Circuits, Systems, and Signal Processing 2016 8 citations DOI: 10.1007/s00034-016-0257-z
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• Combined gate replacement and transmission gate based logic insertion algorithm for leakage optimization in VLSI circuits
  International Journal of Applied Engineering Research 2015
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• Verilog implementation of genetic algorithm for minimum leakage vector in input vector control approach
  International Conference on Signal Processing and Communication Engineering Systems - Proceedings of SPACES 2015, in Association with IEEE 2015 3 citations DOI: 10.1109/SPACES.2015.7058231
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• Implementation of ADPLL with 0.6μm CMOS process for SOC applications
  Communications in Computer and Information Science 2010 1 citation DOI: 10.1007/978-3-642-14493-6_70
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