0000-0003-2645-517X Employment
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Publications (19)
- Look‐Up Table Framework for p‐Channel Double‐Gate MOSFETs: Silicon vs. Germanium Evaluation Save
- Implementation of Low-Powered Flexible OTFT Compact Model for Digital Logic Circuits Simulation Save
- Efficient and accurate modeling of double-gate MOSFETs: a computationally feasible approach for potential, subthreshold, and drain current characteristics Save
- Power-efficient VLSI realization of decimal convolution algorithms for resource-constrained environments: a design perspective in CMOS and double-gate CMOS technology Save
- Biologically Inspired Tonic and Bursting LIF Neuron Model for Spiking Neural Network: A CMOS Implementation Save
- Efficient Modulo Multiplier Save
- Design and Implementation of Multi-operand 2n- 1, 2n, and 2n+ 1 Modulo Set Adder Save
- Implementation Aspects of Multi-bit Adders Using UTBSOI Transistors Save
- On The Implementation of Densely Packed Decimal Number System based Adder: Prospects and Challenges Save
- Design of double-gate cmos based two-stage operational transconductance amplifier using the utbsoi transistors Save