BUJJIBABU NANNEPAGA

About

Mr. Bujjibabu Nannepaga is IEEE Graduate Member. He received B.Tech. degree in Electronics and Communication Engineering from Jawaharlal Nehru Technological University, Hyderabad, India, in 2008, M. Tech. degree in Digital Electronics and Communication Systems from Jawaharlal Nehru Technological University, Kakinada, India, in 2011. He is currently pursuing the Ph.D. through a scheme of UGC-NET JRF at Sri Venkateswara University, Tirupati, India. His current research interests include Antenna System designing, Electromagnetics and RF system designing, Radio Frequency Energy Harvesting

Employment

• Sri Venkateswara University Research Scholar
  2020 - Present

Education

Education history is unavailable.

Projects & Funding

Projects & funding information is unavailable.

Publications (7)

• Return Loss Prediction of Square Patch Antenna with Defective Ground Structure for RF Energy Harvesting in Smart Cities Using GPR
  2025 DOI: 10.1007/978-981-97-1946-4_32
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• Conditional spatial transition reduction data encoding technique for VLSI interconnects
  e-Prime - Advances in Electrical Engineering, Electronics and Energy 2024 DOI: 10.1016/j.prime.2023.100407
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• Return Loss Prediction of Square Patch Antenna with Defective Ground Structure for RF Energy Harvesting in Smart Cities using ANN
  2024 International Conference on Social and Sustainable Innovations in Technology and Engineering (SASI-ITE) 2024 DOI: 10.1109/sasi-ite58663.2024.00010
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• Enhancing RF energy harvesting in smart cities with two port MIMO-UWB antenna design using machine learning algorithms
  Frequenz 2024 DOI: 10.1515/FREQ-2023-0386
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• High isolated Psi-Shaped 4x4 MIMO UWB antenna for RF energy harvesting applications
  Materials Today: Proceedings 2023 DOI: 10.1016/j.matpr.2023.03.798
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• Input Impedance Analysis of Rectifier for RF Energy Harvesting Applications
  IEEE International Conference on Advances in Electronics, Communication, Computing and Intelligent Information Systems, ICAECIS 2023 - Proceedings 2023 DOI: 10.1109/ICAECIS58353.2023.10169992
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• Low power and compact architecture of sector transition reduction encoding technique
  e-Prime - Advances in Electrical Engineering, Electronics and Energy 2023 DOI: 10.1016/j.prime.2023.100297
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