Kishor Thakre

About

Dr. Kishor Thakre received his B.E. in Electrical & Electronics Engineering from RGPV Bhopal in 2007. He received his M.Tech. and Ph.D in Electrical Engineering from National Institute of Technogy Rourkela, India in 2009 and 2019. He served as an Assistant Professor in UIT-RGPV, Bhopal from 2009 to 2013. Dr. Thakre have published more than 40 research articles in international journals, conference proceedings (SCI, SCOPUS, and Web of science). He is an Active Reviewer of IEEE Transaction on Power Electronics, IET Power Electronics, ITEES Wiley IJE (Taylor & Francis) and some renowned journals. He also served as an Assistant Professor in GEC Jhalawar under TEQIP-III Project funding by World Bank during 2018 to 2021. His research interests in multilevel inverters especially in the topology analysis, modelling of power electronics converters for renewable energy applications and in machine drives.

Employment

• Rabindranath Tagore University Associate Professor
  2009 - 2022

Education

• National Institute of Technology Rourkela Ph.D
  2014 - 2019

Projects & Funding

Projects & funding information is unavailable.

Publications (28)

• Modified cascaded multilevel inverter for renewable energy systems with less number of unidirectional switches
  Energy Reports 2022 DOI: 10.1016/j.egyr.2022.03.167
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• Modified Cascaded Multilevel Inverter for Renewable Energy Systems with Less Number of Unidirectional Switches
  SSRN 2022
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• Investigation Analysis of Dual Loop Controller for Grid Integrated Solar Photovoltaic Generation Systems
  Lecture Notes in Electrical Engineering 2021 DOI: 10.1007/978-981-15-8815-0_14
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• Trapezoidal Triangular Carrier-Based PWM Scheme for Performance Enhanced in Multilevel Inverter
  Lecture Notes in Electrical Engineering 2021 DOI: 10.1007/978-981-15-7675-1_13
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• Modelling and Simulation of an Asymmetrical Modular Multilevel Inverter with Less Number of Components
  EPE Journal (European Power Electronics and Drives Journal) 2020 DOI: 10.1080/09398368.2020.1725857
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• Modified circuit for cascaded multilevel inverter with reduced number of switches
  9th IEEE International Conference on Power Electronics, Drives and Energy Systems, PEDES 2020 2020 DOI: 10.1109/PEDES49360.2020.9379343
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• A modified circuit for symmetric and asymmetric multilevel inverter with reduced components count
  International Transactions on Electrical Energy Systems 2019 DOI: 10.1002/2050-7038.12011
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• Reduction in components using modified topology for asymmetrical multilevel inverter
  World Journal of Engineering 2019 DOI: 10.1108/WJE-01-2017-0010
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• New topology for asymmetrical multilevel inverter: An effort to reduced device count
  Journal of Circuits, Systems and Computers 2018 DOI: 10.1142/S021812661850055X
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• Reduction of circuit devices in symmetrical voltage source multilevel inverter based on series connection of basic unit cells
  Alexandria Engineering Journal 2018 DOI: 10.1016/j.aej.2017.11.001
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