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Publications (5)
- Design and implementation of low power multiplier using proposed two phase clocked adiabatic static CMOS logic circuit Save
- Smart (Dual) Mode Operating Cooling System Save
- Design and implementation of energy efficient Adiabatic ECRL and basic gates Save
- Modified quasi static energy recovery adiabatic logic implementation for low power application Save
- VLSI design of analog multiplier based on NMOS technology Save