Devashree Tripathy
Indian Institute of Technology Bhubaneswar, Harvard University, CSIR-CEERI, Veer Surendra Sai University of Technology
About
Dr. Devashree Tripathy is an Assistant Professor in Computer Science and Engineering at Indian Institute of Technology, Bhubaneswar. Her research spans in Computer Architecture , High Performance Computing, Fault-Tolerance systems, performance and power-efficient designs for accelerators, and machine learning. Her current research focuses on ML for Systems and Systems for ML. Prior to joining IIT Bhubaneswar, Dr. Tripathy was a Postdoctoral Fellow in Computer Science at Harvard University, working with Dr. David Brooks in Harvard Architecture, Circuits, and Compilers Group. She is currently working as an Associate with Harvard University. She graduated from University of California, Riverside with PhD in Computer Science and was advised by Distinguished Prof. Laxmi N. Bhuyan and Prof.Daniel Wong.
Homepage: https://devashreetrip.github.io/
Employment
-
Indian Institute of Technology Bhubaneswar Assistant Professor2022 - Present
-
Harvard University Associate2022 - Present
-
Harvard University Postdoctoral Research Fellow2021 - 2022
Education
-
CSIR-CEERI Masters in Technology2012 - 2014
-
Veer Surendra Sai University of Technology Bachelor in Technology2008 - 2012
Projects & Funding
Projects & funding information is unavailable.
Publications (14)
- ArchGym: An Open-Source Gymnasium for Machine Learning Assisted Architecture Design Save
- FARSI: An Early-stage Design Space Exploration Framework to Tame the Domain-specific System-on-chip Complexity Save
- ICAP: Designing Inrush Current Aware Power Gating Switch for GPGPU Save
- LocalityGuru: A PTX Analyzer for Extracting Thread Block-level Locality in GPGPUs Save
- PAVER: Locality Graph-Based Thread Block Scheduling for GPUs Save
- SAOU: Safe adaptive overclocking and undervolting for energy-efficient GPU computing Save
- Slumber: Static-power management for GPGPU register files Save
- GreenMM: Energy efficient GPU matrix multiplication through undervolting Save
- Real-Time BCI System Design to Control Arduino Based Speed Controllable Robot Using EEG Save
- WIREFRAME: Supporting data-dependent parallelism through dependency graph execution in GPUs Save