G Dhanabalan

Employment

• Vel Tech Rangarajan Dr. Sagunthala R&D Institute of Science and Technology Professor
  2022 - Present
• AAA College of Engineering and Technology Associate Professor
  2020 - 2022
• Sri Vidya College of Engineering and Technology Associate Professor & hoD
  2019 - 2020
• Kalasalingam Academy of Research and Education Associate Professor
  2017 - 2019
• Kamaraj College of Engineering and Technology Assistant Professor
  2007 - 2017
• Sri Shakthi Institute of Engineering and Technology Lecturer
  2007 - 2007
• Sree Sowdambika College of Engineering Lecturer
  2003 - 2005

Education

• Anna University Chennai Ph.D.,
  2010 - 2016
• Arulmigu Kalasalingam College of Engineering M.E. - VLSI Design
  2005 - 2007
• Arulmigu Kalasalingam College of Engineering B.E.
  1990 - 1994

Projects & Funding

Projects & funding information is unavailable.

Publications (13)

• Resource efficient design of 16 x 16 multiplier by Block RAM generalized to n x n multiplier realized in FPGA
  International Research Journal of Multidisciplinary Technovation 2025 DOI: 10.54392/irjmt2556
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• A GAN-based Hybrid Deep Learning Approach for Enhancing Intrusion Detection in IoT Networks
  International Journal of Advanced Computer Science and Applications (IJACSA) 2024 DOI: 10.14569/IJACSA.2024.0150637
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• Secure Route Detection with Multi Level Trust Evaluation Model Using Replicated Auditor Node for Extended Packet Delivery Rate in WSN
  Revue d'Intelligence Artificielle 2023 DOI: 10.18280/ria.370406
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• Software Design of VerilogHDL Code Generation for Ladder Diagram and Data Acquisition Using LABVIEW
  Wireless Personal Communications 2023 DOI: 10.1007/s11277-022-09990-7
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• Scan Time Reduction of PLCs by Dedicated Parallel-Execution Multiple PID Controllers Using an FPGA
  Sensors 2022 DOI: 10.3390/s22124584
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• Software Design of Veriloghdl Code Generation for Ladder Diagram and Data Acquisition Using LABVIEW
  2021 DOI: 10.21203/rs.3.rs-663333/v1
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• FPGA Design of SAR Type ADC Based Analog Input Module for Industrial Applications
  Lecture Notes in Electrical Engineering 2021 DOI: 10.1007/978-981-15-6229-7_8
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• DRIVER DROWSINESS DETECTION USING VISUAL INFORMATION
  International Journal of Emerging Technology and Innovative Engineering 2019
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• Identification of Stuck-at-faults of Full Adder using FPGA as a Testing Device
  IEEE International Conference on Intelligent Techniques in Control, Optimization and Signal Processing (INCOS) 2019 DOI: 10.1109/INCOS45849.2019.8951350
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• Realization of Resource Efficient Block RAM Based Eight Bit Adder in FPGA
  IEEE International Conference on Intelligent Techniques in Control, Optimization and Signal Processing (INCOS) 2019 DOI: 10.1109/INCOS45849.2019.8951332
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