0000-0003-4463-4171 About
Date: Dec 31st, 2023
Sudhanshu Choudhary has 10 years of post PhD teaching and research experience. He has published more than 80 SCI (ISI) research papers in high impact factor science citation indexed journals. He has also supervised 2 PhD (awarded), 3 PhD (thesis submitted), 3 PhD (ongoing) and 40 Master’s dissertations. He is on the list of panel of experts of several international journals and project funding agencies (SERB-DST) and has refereed many international conferences.
He has a PhD degree from Indian Institute of Technology (IIT) Kanpur, India. He has electrical and electronics background with specialization in microelectronics, nanoelectronics, Digital electronics, Analog Electronics, Semiconductor Devices and nanoelectronics (molecular electronics), Analog integrated circuit design, and Quantum devices and quantum information processing systems. He has a good command on ab-initio simulations using DFT in combination with NEGF. His areas of research have been Molecular Electronics simulations using Density Functional Theory (DFT) in combination with Non Equilibrium Green's Function (NEGF), Carbon Nanotubes and other Nanostructures, Interconnects and Clock Distribution Networks, Microelectronics, VLSI and Semiconductor Devices and Circuits. Besides this he also has an exposure to fabrication and characterization of devices like (Organic Thin Film transistors) OTFT and (Organic Light Emitting Diode) OLED.
He has a solid experience in conducting research and academic activities in the area of VLSI Design and Nanoelectronics through master and doctorate program under the supervision of his PhD thesis supervisor Prof. S. Qureshi, who is a key person in the area of VLSI/EDA field who has developed State-of-the-Art VLSI / EDA Design Laboratory Equipped with Industry Standard Digital and Analog Design Tools at Indian Institute of Technology Kanpur India. He has also administered VLSI Design Laboratory at University of Malaysia, Sarawak, Malaysia. His group in India is responsible for Design and Tape outof first application specific integrated circuit (ASIC) at I. I.T. Kanpur. The taped out chip was fabricated by Euro- practice in Belgium. From the year 2016 to 2022, Sudhanshu was co-chief coordinator of national project on VLSI design activities in India under ministry of communication and information technology Govt. of India. To raise share of India in VLSI Design activity in the world market his group in India has been promoting VLSI Design activity in the country by offering short courses to teachers and students.
Employment
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University of North Dakota Instructor
Education
Education history is unavailable.
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Publications (103)
- Design and Simulation Modelling of MAXI3 and FAXI3 Perovskite Solar Cells with Different Electron Transport Layers and Hole Transport Layers for Energy Harvesting Save
- Thermal stability analysis of AlGaN/GaN HEMT with multiple quantum wells for emerging nanoelectronics Save
- Power Analysis Attack Resilient 9T and 10T NVSRAM for Emerging Memory Save
- DC and RF Analysis of E-mode Single Quantum-Well AlGaN/GaN HEMT for Power Amplifier Application Save
- Effects of music therapy, mantra therapy, and alpha beta binaural beats on human energy fields using RFI technology Save
- Enhanced absorption in SnS/SnSe, SnS/ZnS, and SnS/ZnSe vdW heterostructures for optoelectronic applications: DFT insights Save
- Halogens and Alkali Metals Adsorbed Uni-axially Strained ZnS Sphalerite Monolayer for Application in Optoelectronics Save
- Highly Reliable, Stable, and Store Energy Efficient 8T/9T-2D-2MTJ NVSRAMs Save
- Strain tunability of the properties of Fe-doped lithium niobate for optoelectronic applications: Theoretical insights Save
- Transition metal induced- magnetization and spin-polarisation in black arsenic phosphorous Save