Dr. BHEEMAPPA HALAVAR

Employment

• Indian Institute of Information Technology Sri City Assistant professor
  2020 - Present
• M S Ramaiah Institute of Technology Assistant professor
  2019 - 2020
• SECAB Institute of Engineering and Technology Assistant professor
  2013 - 2014

Education

• National Institute of Technology Karnataka Ph.D
  2014 - Present
• Visvesvaraya Technological University Master of Technology
  2011 - 2013
• Visvesvaraya Technological University bachelor of engineering
  2007 - 2011

Projects & Funding

Projects & funding information is unavailable.

Publications (15)

• Analysis of Parallel K-Limit Selection Sort Based K Nearest Neighbors for Image Classification
  Lecture Notes in Networks and Systems 2024 DOI: 10.1007/978-3-031-64850-2_39
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• Design of Silicon Core Coaxial TSVs to Reduce Crosstalk Effects for 3D IC Applications
  IETE Journal of Research 2024 DOI: 10.1080/03772063.2024.2385720
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• Performance Analysis of Weighted Victim Cache Replacement Policy
  Proceedings of the IEEE International Conference on High Performance Computing Data and Analytics Workshops Hipcw 2024 DOI: 10.1109/HiPCW63042.2024.00052
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• Optical switching for high-performance computing
  Optical Switching Device Technology and Applications in Networks 2022 DOI: 10.1002/9781119819264.ch17
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• Power and performance analysis of 3D network-on-chip architectures
  Computers & Electrical Engineering 2020 DOI: 10.1016/j.compeleceng.2020.106592
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• OP3DBFT: A power and performance optimal 3D BFT NoC architecture
  Advances in Intelligent Systems and Computing 2020 DOI: 10.1007/978-3-030-16657-1_86
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• Extending BookSim2.0 and HotSpot6.0 for power, performance and thermal evaluation of 3D NoC architectures
  SIMULATION MODELLING PRACTICE AND THEORY 2019 DOI: 10.1016/J.SIMPAT.2019.101929
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• Floorplan Based Performance Evaluation of 3D Variants of Mesh and BFT Networks-on-Chip
  2018 International Conference on Signal Processing and Communications (SPCOM) 2018 DOI: 10.1109/spcom.2018.8724488
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• Accurate Performance Analysis of 3D Mesh Network on Chip Architectures
  2018 IEEE International Conference on Electronics, Computing and Communication Technologies, CONECCT 2018 2018 DOI: 10.1109/CONECCT.2018.8482383
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• Accurate Performance Analysis of 3D Mesh Network on Chip Architectures
  2018 IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, COMPUTING AND COMMUNICATION TECHNOLOGIES (CONECCT) 2018
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