0000-0003-4954-1214 Employment
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Maulana Azad National Institute of Technology ASSISTANT PROFESSOR2024 - Present
Education
Education history is unavailable.
Projects & Funding
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Publications (14)
- Advanced CJ-NFe-FET architectures with ferroelectric gate stacks: Optimizing Electrostatics, linearity, and energy storage for next-generation nanoelectronics Save
- Enhancing VLSI Design Efficiency With ML-Based C-ANN: Performance Optimization of Gate-Stacked Ferroelectric FE-MOSFETs for High-Speed and RF Applications Save
- Impact of Buried Gate Oxide on the Electrical Performance of Negative Capacitance FinFETs: Design Perspectives Save
- Buried interfacial gate oxide for tri-gate negative-capacitance fin field-effect transistors: approach and investigation Save
- Demonstration of Improved Short Channel Performance Metrics for Ferroelectric Concentric Negative Capacitance FinFET Save
- Estimation of performance degradation due to interface traps in the gate and spacer stack of NC-FinFET Save
- Performance Evaluation of Buried Gate Oxide based Negative Capacitance FinFETs Save
- Demonstration of High-Permittivity Sidewall Spacer in Negative Capacitance FinFET Save
- Exploration and Device Optimization of Dielectric-Ferroelectric Sidewall Spacer in Negative Capacitance FinFET Save
- Quasi-analytical model of surface potential and drain current for trigate negative capacitance FinFET: a superposition approach Save