Aditi Paul

About

A PhD scholar working in the area of VLSI DSP architectures for 5G and Beyond in the Department of Electronics & Electrical Engineering, IIT Guwahati, India.

Employment

• Indian Institute of Technology Guwahati Ph.D scholar
  2021 - Present

Education

• IIT Guwahati Ph.D.
  2021 - Present
• Jamia Millia Islamia M.Sc
  2018 - 2020
• Sri venkateshwara College,University of Delhi B.Sc
  2015 - 2018

Projects & Funding

Projects & funding information is unavailable.

Publications (7)

• A High-Throughput Continuous-Flow Reordering Scheme for 4096-Point FFT/IFFT in 5G Systems
  IEEE Embedded Systems Letters 2026 DOI: 10.1109/LES.2026.3729850
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• Analyzing Gender-Specific Neural Functional Connectivity Patterns for Multi-Channel EEG-Based Emotion Recognition
  National Conference on Communications, NCC 2026 DOI: 10.1109/NCC68160.2026.11478872
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• Design and Implementation of a 256-Point FFT Hardware for Power Spectral Density Computation in EEG-Based Mental Stress Recognition
  National Conference on Communications, NCC 2026 DOI: 10.1109/NCC68160.2026.11479054
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• Continuous Flow 4096-Point FFT/IFFT Hardware Architecture for 5G Applications
  IEEE Transactions on Circuits and Systems I: Regular Papers 2025 DOI: 10.1109/TCSI.2025.3583920
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• FD-DCNN: A Fourier Domain Denoising Convolutional Neural Network for Cardiac Artifact Removal in Single Channel EEG Signals
  Proceedings of the IEEE Signal Processing in Medicine and Biology Symposium (SPMB) 2025 DOI: 10.1109/SPMB67169.2025.11345430
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• ASIC and FPGA Implementation of Radix-2^2 32-point MDC-FFT Architecture
  2023 IEEE Silchar Subsection Conference (SILCON) 2023
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• ASIC and FPGA Implementation of Radix-2232-point MDC-FFT Architecture
  IEEE Silchar Subsection Conference 2023 DOI: 10.1109/SILCON59133.2023.10404543
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