Neha Maheshwari

About

Dr. Neha Maheshwari is an Assistant Professor in the Department of Electrical and Electronics Engineering at (SVITS), Shri Vaishnav Vidyapeeth Vishwavidyalaya (SVVV), Indore, India. She received her Bachelor of Engineering from Mahakal Institute of Technology, Ujjain, Master of Technology in Microelectronics and VLSI Design from Shri G. S. Institute of Technology and Science (SGSITS), Indore, and Ph.D. in Electrical Engineering from the Nanoscale Devices, VLSI Circuit and Systems (NSDCS) Lab, Indian Institute of Technology (IIT) Indore, India.
Her research interests span hardware security, Physical Unclonable Functions (PUFs), compute-in-memory architectures, low-power VLSI design, CMOS integrated circuits, ASIC design, and semiconductor system-on-chip development for edge computing applications. She has published her research in reputed journals, including the IEEE Internet of Things Journal, Integration: The VLSI Journal, and the IETE Journal of Research, and has presented her work at leading international conferences.
Dr. Maheshwari has over a decade of academic experience and extensive expertise in CMOS IC design, schematic-to-GDSII implementation, silicon validation, and ASIC tapeout. She has contributed to successful semiconductor tapeouts in SkyWater 130 nm and SCL 180 nm technologies and serves as Co-Principal Investigator of a DST-supported project focused on secure semiconductor chip development. She is also the founder of Tulshree Technologies Pvt. Ltd., a startup dedicated to semiconductor design, hardware security solutions, and skill development aligned with the India Semiconductor Mission. In addition, she has actively contributed to the IEEE Circuits and Systems Society through leadership and outreach activities, promoting semiconductor education and research among students and professionals.

Employment

• Shri Vaishnav Vidyapeeth Vishwavidyalaya, Indore Assistant Professor
  2007 - Present

Education

Education history is unavailable.

Projects & Funding

Projects & funding information is unavailable.

Publications (3)

• CIM-Enabled MBRO PUF: Integrating Multistage BRO and Reconfigurable SRAM for Edge Security Applications
  IEEE Internet of Things Journal 2026 DOI: 10.1109/jiot.2025.3636998
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• Gated logic controlled 10T-SRAM for low-power bidirectional ring oscillators
  Integration 2026 DOI: 10.1016/j.vlsi.2025.102588
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• BRO PUF: A Bi-directional Ring Oscillator-Based PUF for IoT Security
  IETE Journal of Research 2025 DOI: 10.1080/03772063.2025.2540042
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