SP

Sudipta Paul

Cadence Design Systems, Siemens, University of Calcutta, Maharaja Manindra Chandra College (University of Calcutta), Brahmo Balika Shikshalaya

Research areas: Engineering · Electrical and Electronic Engineering · VLSI and FPGA Design Techniques · Advancements in Photolithography Techniques · Copper Interconnects and Reliability

ORCID iD 0000-0001-8699-5341
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Employment

  • Cadence Design Systems Lead Software Engineer
    2022 - Present
  • Siemens R&D engineer
    2020 - 2022

Education

  • University of Calcutta Ph.D
    2017 - Present
  • University of Calcutta M.Tech
    2011 - 2013
  • University of Calcutta M.Sc
    2009 - 2011
  • Maharaja Manindra Chandra College (University of Calcutta) B.Sc (Honours in Computer Science)
    2006 - 2009
  • Brahmo Balika Shikshalaya Higher Secondary
    2004 - 2006
  • Brahmo Balika Shikshalaya Madhyamik
    2002 - 2004

Projects & Funding

Projects & funding information is unavailable.

Publications (2)