AS
Aakansha Suchitta
CentraleSupélec, Institut des Sciences Moléculaires d'Orsay, Purdue University West Lafayette, Indian Institute of Technology Delhi, Netaji Subhas University of Technology
Research areas: Engineering · Biomedical Engineering · Plasmonic and Surface Plasmon Research · Gold and Silver Nanoparticles Synthesis and Applications · Metamaterials and Metasurfaces Applications
Employment
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CentraleSupélec Postdoctoral Researcher2025 - 2027
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ISMO Postdoctoral Researcher2024 - 2025
Education
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Purdue University Visiting Research Scholar2019 - 2020
- 2016 - 2021
- 2014 - 2016
- 2010 - 2014
Projects & Funding
Projects & funding information is unavailable.
Publications (14)
- Experimental Demonstration of a Mechanically Fabricated Stress-Engineered Optical Element for Structured Beam Generation and Scintillation Reduction Save
- Bandgap engineering and carrier dynamics in MoSSe alloys: A comparative analysis with MoS2 and MoSe2 Save
- One Network–One Nation–One Health India’s Strategic Blueprint for Resilient, Cross-Sectoral Health Systems Save
- Numerical investigation of plasmonic bowtie nanorings with embedded nanoantennas for achieving high SEIRA enhancement factors Save
- Enhanced SPR-Based Localized and Bulk Sensing Using a Plasmonic Nanopillar Array With Spacer Save
- Nanostructured plasmonic chips employing nanopillar and nanoring hole arrays for enhanced sensitivity of SPR-based biosensing Save
- Chiro-optical response of a wafer scale metamaterial with ellipsoidal metal nanoparticles Save
- Non-Uniform Narrow Groove Plasmonic Nano-Gratings for SPR Sensing and Imaging Save
- Numerical investigation of a narrowband absorber with a simple structure Save
- Plasmonic nanostructures for enhanced performance of microcrystalline silicon solar cells Save
- Design and modeling of SERS based sensor chips for applications in nanomedicine Save
- Preparation of graphene oxide-graphene quantum dots hybrid and its application in cancer theranostics Save
- Au nanowire-VO2 spacer-Au film based optical switches Save
- Design of Low-Voltage, Low-Power FGMOS Based Voltage Buffer, Analog Inverter and Winner-Take-All Analog Signal Processing Circuits Save