Abhishek Kumar

About

Abhishek Kumar is currently as RA in SMDP C2SD project. He is also pursuing his PhD from Motilal Nehru National Institute of technology Allahabad, Prayagraj, India. His mai research area is analog and RF circuit design. He is working on transmitter designing for low power devices. He has also workerd in device modelling.

Employment

• Chandigarh University Assistant Professor
  2016 - Present

Education

Education history is unavailable.

Projects & Funding

Projects & funding information is unavailable.

Publications (10)

• A High-Performance Si0.5Ge0.5 Source Vertical Nanowire TFET for Ultra-Sensitive Biosensing and High-Speed Comparator Applications
  Engineering Research Express 2026 DOI: 10.1088/2631-8695/aea753
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• A 12‐bit SC 3 partially segmented current steering DAC with improved SFDR and bandwidth
  International Journal of Circuit Theory and Applications 2022 DOI: 10.1002/cta.3312
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• Design of IF-RF-Based Heterodyne Transmitter Using Current Steering DAC with 5.4 GHz Spur-Free Bandwidth
  IETE Journal of Research 2022 DOI: 10.1080/03772063.2022.2069168
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• Low-power and low glitch area current steering DAC
  Engineering Science and Technology, an International Journal 2022 DOI: 10.1016/j.jestch.2021.06.015
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• 865–867 MHz 180 nm Transmitter with Direct BPSK Modulation for Wireless Sensor Application
  Lecture Notes in Electrical Engineering 2022 DOI: 10.1007/978-981-16-2761-3_60
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• A Low Power Approach for Designing 12-Bit Current Steering DAC
  Lecture Notes in Electrical Engineering 2021 DOI: 10.1007/978-981-15-6840-4_49
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• Controlling GIDL Using Core–Shell Technique in Conventional Nano-Wire
  Lecture Notes in Electrical Engineering 2021 DOI: 10.1007/978-981-15-6840-4_60
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• Analog and RF performance of a multigate FinFET at nano scale
  Superlattices and Microstructures 2016 DOI: 10.1016/j.spmi.2016.10.073
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• Analytical modelling of subthreshold characteristics of RE-GAA FinFET using center potential
  Superlattices and Microstructures 2016 DOI: 10.1016/j.spmi.2016.10.085
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• Optimizing FinFET parameters for minimizing short channel effects
  2016 International Conference on Communication and Signal Processing (ICCSP) 2016 DOI: 10.1109/iccsp.2016.7754396
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